本帖最后由 jzywing 于 2025-6-10 10:51 编辑
新唐M487SIDAE SPI从机模式接收数据异常SPI配置代码如下
//SPI0 to 192Mhz
CLK->CLKSEL2 =
(CLK->CLKSEL2 & ~(0
| CLK_CLKSEL2_SPI0SEL_Msk
))
| CLK_CLKSEL2_SPI0SEL_PLL
;
CLK->APBCLK0 |= CLK_APBCLK0_SPI0CKEN_Msk;
//SPI0 slave config
SPI0->CLKDIV |= 0x4C; //2.5M
SPI0->CTL = 0
| 8 << SPI_CTL_DWIDTH_Pos //8 bits
| 0 << SPI_CTL_SUSPITV_Pos //2 SPICLOCK delay
| 1 << SPI_CTL_CLKPOL_Pos //CLK IDLE Hight
| SPI_CTL_SPIEN_Msk //SPI Enable
| SPI_CTL_SLAVE_Msk //SLAVE Mode
| SPI_CTL_TXNEG_Msk
// | SPI_CTL_RXNEG_Msk
| SPI_CTL_UNITIEN_Msk
;
仿真接收数据异常段如图所示:
|